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PhD Defense of Luca PIRRO

Published on November 12, 2015
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PhD Defense November 24, 2015 | Access map
Thesis defense of Luca PIRRO  for a doctoral thesis at the University of Grenoble,  Nano Electronics and Nanotechnologies speciality, entitled:
Room M-A102 -  Phelma Minatec
3 Parvis Louis Néel - CS 50257
38016 Grenoble Cedex 01

" Electrical characterization and modeling of advanced SOI substrates "

PIRRO Luca

PIRRO Luca

Tuesday 24 November 2015 at 10:00

Abstract :
Silicon-on-insulator (SOI) substrates represent the best solution to achieve high performance devices. Electrical characterization methods are required to monitor the material quality before full transistor fabrication. The classical configuration used for SOI measurements is the pseudo-MOSFET. In this thesis, we focused on the enrichment of techniques in Ψ-MOSFET for the characterization of bare SOI and III-V wafers. The experimental setup for static ID-VG was improved using a vacuum contact for the back gate, increasing the measurement stability. Furthermore, this contact proved to be critical for achieving correct capacitance values with split-CV and quasi-static techniques (QSCV). We addressed the possibility to extract Dit values from split-CV and we demonstrated by modeling that it is impossible in typical sized SOI samples because of the time constant associated to the channel formation. The limitation was solved performing QSCV measurements. Dit signature was experimentally evidenced and physically described. Several SOI structures (thick and ultra-thin silicon films and BOX) were characterized. In case of passivated samples, the QSCV is mostly sensitive to the silicon film-BOX interface. In non-passivated wafers, a large defect related peak appears at constant energy value, independently of the film thickness; it is associated to the native oxide present on the silicon surface. For low-frequency noise measurements, a physical model proved that the signal arises from localized regions surrounding the source and drain contacts.

Keyword:
Silicon-on-insulator (SOI), pseudo-MOSFET (Ψ-MOSFET), static ID-VG, split-CV, quasi-static capacitance (QSCV), low-frequency noise (LFN), III-V materials.

Member of  jury :
•    Sorin CRISTOLOVEANU - Supervisor
•    Irina IONICA - Co- supervisor
•    Cristell MANEUX - Rapporteur
•    Alexander ZASLAVSKY - Rapporteur
•    Jean-Pierre RASKIN - Reviewer
•    Frédéric ALLIBERT - Reviewer

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Partenaires

Thesis prepared in the laboratory IMEP-LaHC supervised by Sorin CRISTOLOVEANU, supervisor and Irina IONICA Co-supervisor.

Date of update November 12, 2015

Contact

M. Sorin CRISTOLOVEANU
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IMEP-LAHC
Grenoble site
Grenoble INP - Minatec : 3, Parvis Louis Néel - CS 50257 - 38016 Grenoble Cedex 1

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Université de Savoie - F73376 Le Bourget du Lac Cedex
 


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