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PhD Defense of Mohamed AOUAD

Published on July 7, 2022
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PhD Defense July 8, 2022 | Access map
Defense of doctoral thesis of Mohamed AOUAD, for the  University  Grenoble Alps, speciality  " NANO ELECTRONIC & NANOTECHNOLOGIES ", entitled:
Room Z108 PHELMA / MINATEC
3 rue Parvis Louis Néel 38016 GRENOBLE Cedex 1

Compact modeling of FDSOI transistors at cryogenic temperatures

PHD

PHD

Friday, July 8, 2022  at 10:00 am
 
Keywords:
Compact modeling,cryogenic,FDSOI

Abstract :
Compact models describing the operation of MOS devices at cryogenic temperatures are crucial for the designing of reliable and optimized circuits. Nowadays, process-design kits lack models for all devices at deep cryogenic temperatures, whether it is a MOSFET, a qubit, or a passive device. The task of building compact models for cryogenic operation needs to be tackled urgently, mainly because today’s circuit simulations fail to function as expected down to cryogenic temperatures. Consequently, excessive simulations are needed to be done to account for the changes in different parameters.
There are two approaches to deal with this task, the first one is to take existing standard compact models, which are originally built for room temperature operation and try to adapt them to cryogenic temperature operation through empirical formulas. It should be noted that for this approach the circuit performance is not guaranteed, and they are designed with a non-negligible degree of uncertainty. The second approach, which is a research approach and the one we choose in the frame of this thesis, is to build fully-physics based compact models that are dedicated for cryogenic device operation. Compared to the first approach, this approach should be less risky and the output design-wise is much more appropriate and precise.
Current standard compact models can scale down to liquid Nitrogen temperature 77K, but at liquid Helium temperature 4.2K and below some discontinuities start appearing in the moderate inversion region. Moreover, neither of the FDSOI cryogenic operation published works demonstrate in an extensive manner the transistor electrostatics characteristics that is to say the electrostatic surface potentials for both interfaces, and the C – V curves. Likewise, the Fermi-Dirac statistics need to be considered in the transport part in the drain current derivation and not only in the electrostatics part. Furthermore, most of the published works maintain the RT mobility laws and adapt them to cryogenic behavior by modifying/adding fitting parameters or considering a constant mobility in the linear regime, but none considers introducing a proper mobility law dedicated for MOSFETs operating at cryogenic temperatures.
Besides, Numerical simulations are an important step that must precede the development of an analytical model and that will serve as a solid ground for the validation of its results/approximations. No numerical simulation has been held in such conditions, whether the simulation of the electrostatics at equilibrium, or electronic transport out of equilibrium. The use of such simulations is very important and necessary for the development of compact models. In the frame of this work, Poisson-Schrodinger simulations of the FDSOI structure at cryogenic temperatures and accounting for Fermi-Dirac statistics were held to exploit and understand the device’s electrostatics primarily, and then the simulations were held with the introduction of a quasi-Fermi level term to analyze the transport aspect of the device.
The scope of this thesis therefore, is to exploit the device’s physics of FDSOI transistors down to deep cryogenic temperatures and to develop an appropriate core compact model. Such work would be the foundation into a compact model that is suitable for spice simulations.

Jury members :
  • Gerard GHIBAUDO,   RESEARCH DIRECTOR - CNRS : Supervisor      
  • Christian ENZ ,  PROFESSOR - EPFL Valais  :  Reviewer
  • Francis CALMON ,  PROFESSOR of UNIVERSITIES - INSA de Lyon  : Reviewer
  • Anne  KAMINSKI-CACHOPO , PROFESSOR of UNIVERSITIES - GRENOBLE INP : Examiner
  • Philippe  GALY,  ENGENEER HDR - STMicroelectronics : Examiner

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Partenaires

Thesis prepared at CEA/LETI  supervised by Gerard GHIBAUDO, supervisor

Date of update July 7, 2022

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