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MOUIS Mireille

Chercheure CNRS


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Directrice de la Fédération des Micro Nano Technologies de 2016 à 2020,
Coordinatrice du projet Européen Nanonets2Sense (H2020/ICT/RIA n° 688329)

CMNE - Micro Nano Electronic Devices
Physics of semiconducting devices with special focus on:

  • Electron transport and electrostatic coupling effects in advanced field-effect transistors with ultra-short channel, ultra-thin SOI substrates, 3D architectures, or 2D materials,
  • Field-effect based biosensors,
  • Operation mechanisms of sensors and energy harvesters exploiting the electromechanical properties of piezoelectric semiconducting nanomaterials.

Activités / CV

Mireille MOUIS (DRCE1 CNRS) is conducting research in the field of semiconducting device physics. She lead the Federation on Micro/NanoTechnologies (FMNT), a research federation of 7 academic laboratories working in this field under the supervision of CNRS, Univ. Grenoble Alpes and Grenoble INP, which has the objective of fostering new synergies and cross-laboratories research projects. She has also initiated a pooling of the resources of FMNT labs in the field of functional characterization into a shared platform, OPE)N(RA, which is open to external users from academy or industry. Mireille Mouis received the "Doctorat de 3ème cycle" and “Doctorat d’État” degrees from Paris-Sud University in 1982 and 1988 and was appointed researcher by CNRS in 1985. From 1980 to 1989, she worked at Institut d’Électronique Fondamentale (IEF, Orsay) on the simulation of submicron III-V heterojunction FETs, with one of the very first analyses of the GaAs/GaAlAs HEMT based on 2D Monte-Carlo simulations. From 1989 to 2000, she was involved in research activities on SiGe base HBTs at CNET Grenoble within a joint CNRS/CNET team of Laboratoire de Physique de la Matière (LPM, Lyon) that was placed under her responsibility after 1994. There, she has been in charge of the initial developments that led to SiGe heterojunction base bipolar transistor integration into the CMOS technology of STMicroelectronics. From 2000 to 2002, within the CPMA (joint projects between CEA/LETI and academic partners), she initiated the development of planar double-gate field-effect transistors on SOI with a CMOS compatible technology. Since 2001, she is working with IMEP-LaHC, Grenoble where she has been coordinating research on the experimental and theoretical study of new architectures for ultimate CMOS and on the physics of nanoscale devices that may extend performance and functionality of integrated circuits. She has been participating or managing several research projects at the regional, national or European level, some of them on-going. She authored or co-authored 6 chapter books and more than 220 papers in international conferences and refereed journals. She is serving as Electron Device Society chapter chair for IEEE France section.

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mise à jour le 10 février 2021

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